ZX81 in one Complex PLD

This is a functional clone of a ZX81 ULA chip. Designed in ABEL by Bodo Wenzel to find out how the ULA works, it uses an Altera MACH210 chip. These use EPROM based memory, so are one-time programmable unless you buy the more expensive windowed ceramic parts. The '210 consists of four kind-of-22V16 GAL structures and a switch/routing pool.

The design runs programs in FAST or SLOW, and saves programs. Bodo reports that loading caused crashes that were alleviated a little by grounding his TV.

The ZX81 tape interface designed by Sinclair is very poor. Firstly the analogue filter circuits are entirely passive - although they filter the signals correctly they also greatly attenuate them. This might be improved by a transistor or two. Secondly the software design simply saves a binary dump of the data without any kind of check-sums or error detection/correction. Thus if the tape input is has any noise in the whole signal then this will corrupt the program and probably cause a crash. This is not a fault with Bodo's logic!

The MACH 210 part is packaged in a 44-pin PLCC, and so is more compact than the FPGA implementations. The original Sinclair ULA had a limited number of I/O pins, being a 40-pin package. and had to use some tricks to get round this. For example, it did not have enough pins to multiplex all the signals required, so it relied on there being resistors between the inputs and outputs. It simply drove the signals to over-ride the signals at the other end of the resistors. The resistors had to be not-too-high values, to maintain reasonable signal drive (470R in the data bus, 1K in the address bus). Thus the current through all these resistors is significant. However it was more important to minimise components than current, since the ZX81 was powered from mains driven PSU.

Bodo's circuit shows the connections between his chip and two 20-way SIL headers. The latter route the signals to the pinout of the original 40-pin Sinclair ULA chip. There are also some resistors and transistors to shift the oscillator signals to compatible levels. The rest of the circuit is identical to the original ZX81.

A future project might be to redesign it for a Flash based in-site programmable chip. The MACH210 data sheet no longer appears on the Altera web site.

It is worth noting that if you wish to make a clone of the ZX81, using this 44-pin CPLD does not have any advantage over the FPGA design using an 84-pin device. This CPLD requires 8 resistors in the D0-7 signal paths, and 9 for A0-8. That's an extra 34 solder joints, and significant current flowing through the resistors. If you modified the design to use LS245 chips instead of resistors, this would reduce current but still leave you with 40 extra solder joints instead. Bringing the total to exactly 84 pins of the FPGA design.

Main Parts:

Click here for all the files involved apart from the PCB circuit diagram.

Click here for Bodo's page on this project

The prototype construction: