| GND | --- | -- | -- | -- | -- | -- | -- | + | 6309EC | 6309C | ||||||||
| GND | --- | -- | -- | -- | -- | -- | + | | | + | -- | -- | -- | -- | -- | <-- | HALT | ||
| !NMI | --> | -- | -- | -- | -- | + | | | | | | | + | -- | -- | -- | -- | <-- | TSC | <-- | XTAL |
| !IRQ | --> | -- | -- | -- | + | | | | | | | | | | | + | -- | -- | -- | --> | LIC | --- | EXTAL |
| !FIRQ | --> | -- | -- | + | | | | | | | | | | | | | | | + | -- | -- | <-- | !RESET | ||
| BS | <-- | -- | + | | | | | | | | | | | | | | | | | | | + | -- | --> | AVMA | <-- | !MRDY |
| 6 | 5 | 4 | 3 | 2 | 1 | 44 | 43 | 42 | 41 | 40 | ||||||||
| BA | <-- | 7 | 63C09 63C09E (PLCC44) |
39 | --> | Q | ||||||||||||
| VCC | --- | 8 | 38 | --> | E | |||||||||||||
| A0 | <-- | 9 | 37 | --> | BUSY | <-- | !DMA/!BREQ | |||||||||||
| A1 | <-- | 10 | 36 | --> | R/!W | |||||||||||||
| A2 | <-- | 11 | 35 | <-> | D0 | |||||||||||||
| A3 | <-- | 12 | 34 | <-> | D1 | |||||||||||||
| A4 | <-- | 13 | 33 | <-> | D2 | |||||||||||||
| A5 | <-- | 14 | 32 | <-> | D3 | |||||||||||||
| A6 | <-- | 15 | 31 | <-> | D4 | |||||||||||||
| A7 | <-- | 16 | 30 | <-> | D5 | |||||||||||||
| A8 | <-- | 17 | 29 | <-> | D6 | |||||||||||||
| 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | ||||||||
| NC | <-- | -- | + | | | | | | | | | | | | | | | | | | | + | -- | --> | NC | ||
| A9 | <-- | -- | -- | + | | | | | | | | | | | | | | | + | -- | -- | <-> | D7 | ||
| A10 | <-- | -- | -- | -- | + | | | | | | | | | | | + | -- | -- | -- | --> | A15 | ||
| A11 | <-- | -- | -- | -- | -- | + | | | | | | | + | -- | -- | -- | -- | --> | A14 | ||
| A12 | <-- | -- | -- | -- | -- | -- | + | | | + | -- | -- | -- | -- | -- | --> | A13 | ||
| + | -- | -- | -- | -- | -- | -- | --- | NC | ||||||||||
Hitachi's superior CMOS versions of the 6809, the 63C09 and 63C09E, generally seemed to be supplied in PLCC44 packages which differ from the Motorola PLCC44 pinout.
Approximate VHDL entity only!
entity 6809E is port( D: inout std_logic_vector(7 downto 0); -- tristate, bidirectional A: inout std_logic_vector(15 downto 0); -- tristate output E,Q: in std_logic; -- clocks n_RST: in std_logic; -- Reset n_IRQ: in std_logic; -- Interrupt Request n_FIRQ: in std_logic; -- Fast Interrupt Request n_NMI: in std_logic; -- Non-Maskable Interrupt n_HALT: in std_logic; -- Halt LIC: in std_logic; -- Last Instruction Cycle n_WR: out std_logic; -- Read Not Write AVMA: out std_logic; -- Advanced Valid Memory Address BUSY: out std_logic; -- Busy TSC: out std_logic; -- Tri-State-Control BS: out std_logic; -- Bus State BA: out std_logic; -- Bus Available ) end entity 6809E;
See 6809E data sheet
HD63B09EP Technical Reference Guide By Chet Simpson and Alan DeKok