6809 / 6809E CPU

Pinout

          6809E 6809
Vss --- 1 --6809E-- 40 <-- !HALT
!NMI --> 2 39 <-- TSC <-- XTAL
!IRQ --> 3 38 --> LIC <-- EXTAL
!FIRQ --> 4 37 <-- !RESET
BS <-- 5 36 --> AVMA <-- !MRDY
BA <-- 6 35 <-- Q -->  
Vcc --- 7 34 <-- E -->  
A0 <-- 8 33 --> BUSY <-- !DMA/!BREQ
A1 <-- 9 32 --> R/!W
A2 <-- 10 31 <-> D0
A3 <-- 11 30 <-> D1
A4 <-- 12 29 <-> D2
A5 <-- 13 28 <-> D3
A6 <-- 14 27 <-> D4
A7 <-- 15 26 <-> D5
A8 <-- 16 25 <-> D6
A9 <-- 17 24 <-> D7
A10 <-- 18 23 --> A15
A11 <-- 19 22 --> A14
A12 <-- 20 21 --> A13

The 6809 is usually in a DIP40 package, as shown above.
Motorola also had a PLCC44 version too.


Hardware structure

Approximate VHDL entity only!

entity 6809E is
port(	D:	inout	std_logic_vector(7 downto 0);	-- tristate, bidirectional
	A:	inout	std_logic_vector(15 downto 0);	-- tristate output
	E,Q:	in	std_logic;	-- clocks
	n_RST:	in	std_logic;	-- Reset
	n_IRQ:	in	std_logic;	-- Interrupt Request
	n_FIRQ:	in	std_logic;	-- Fast Interrupt Request
	n_NMI:	in	std_logic;	-- Non-Maskable Interrupt
	n_HALT:	in	std_logic;	-- Halt
	LIC:	in	std_logic;	-- Last Instruction Cycle
	n_WR:	out	std_logic;	-- Read Not Write
	AVMA:	out	std_logic;	-- Advanced Valid Memory Address
	BUSY:	out	std_logic;	-- Busy
	TSC:	in 	std_logic;	-- Tri-State-Control
	BS:	out	std_logic;	-- Bus State
	BA:	out	std_logic;	-- Bus Available
	)
end entity 6809E;

Checked against 6809E data sheet