ATA (IDE) Interface

Pinout

Shown looking into the drive, at the pins.

  Function Function   Pin   Function function  
Or Reset? Reset PWRGD - 1 2 --- GND    
    D07 <-> 3 4 <-> D08    
    D06 <-> 5 6 <-> D09    
    D05 <-> 7 8 <-> D10    
    D04 <-> 9 10 <-> D11    
    D03 <-> 11 12 <-> D12    
    D02 <-> 13 14 <-> D13    
    D01 <-> 15 16 <-> D14    
    D00 <-> 17 18 <-> D15    
    GND --- 19 20   NC/ KEY Key  
DMA Request DMARQ DDRQ0 <-- 21 22 --- GND    
Not I/O Write !DIOW !IOWR --> 23 24 --- GND    
Not I/O Read !DIOR !IORD --> 25 26 --- GND    
I/O Ready IORDY IORDY <-- 27 28 -- ITPU1 CSEL  
DMA Ack. !DMARK !DDAK0 --> 29 30 --- GND    
Interrupt Req. INTRQ IRQ14 <-- 31 32 -- !ISAIO16 !IOCS16  
  DA1 A01 --> 33 34 -- !PDIAG(NC) !PDIAG  
  DA0 A00 --> 35 36 <-- A02 DA2  
Not Chip Select 1 !CS1FX !CS1P --> 37 38 <-- !CS3P !CS3FX Not Chip Select 3
  !DASP IDEACK --> 39 40 --- GND    
    VCC(logic) <-> 41 42 --- VCC(motor)   See note below
    GND <-> 43 44 -- -XT/AT    

IDE and EIDE: 40 pins (3.5" drives) or 44 pins (2.5" drives)

Carries eight I/O mapped 16-bit locations, and signals for DMA transfer.

NB check signal directions!!!!

Pins 1-40 present on all drives.

Pins 41-44 only present on the 2 mm pitch connections used in 2.5" drives.

Registers

Reg selected by ata_a(2 downto 0).

  Reg   ATA ATAPI
CHS LBA
Command
registers:
!CS0 = 0
 0 to 5 rd High Z
wr X
5   High Z Status
  X Command
6 r/w Altern Status Alternate status
Device control
7 r/w Drive Address Not used
Control
registers:
!CS1 = 0		 0 r/w Data Port
1 rd Error Register
wr Precomp Feature
2 r/w Sector Count Interrupt reason
Not used
3 r/w Sector Number LBA bits 7 downto 0 Not used
4 r/w Cylinder Low LBA bits 15 downto 8 Byte count low
5 r/w Cylinder High LBA bits 24 downto 16 Byte count high
6 r/w Head select Drive select &
LBA bits 27 downto 24		 Device select
7 rd Status
wr Command