AY3-891x
Pinouts
| |
GND |
--- |
1 |
AY38910
YM2149 |
40 |
--- |
VCC |
| |
NC |
|
2 |
39 |
<-- |
TEST1 |
| |
ANA_B |
<-- |
3 |
38 |
--> |
ANA_C |
| |
ANA_A |
<-- |
4 |
37 |
<-> |
DA0 |
| |
NC |
X- |
5 |
36 |
<-> |
DA1 |
| |
IOB7 |
<-> |
6 |
35 |
<-> |
DA2 |
| |
IOB6 |
<-> |
7 |
34 |
<-> |
DA3 |
| |
IOB5 |
<-> |
8 |
33 |
<-> |
DA4 |
| |
IOB4 |
<-> |
9 |
32 |
<-> |
DA5 |
| |
IOB3 |
<-> |
10 |
31 |
<-> |
DA6 |
| |
IOB2 |
<-> |
11 |
30 |
<-> |
DA7 |
| |
IOB1 |
<-> |
12 |
29 |
<-- |
BC1 |
| |
IOB0 |
<-> |
13 |
28 |
<-- |
BC2 |
| |
IOA7 |
<-> |
14 |
27 |
<-- |
BDIR |
| |
IOA6 |
<-> |
15 |
26 |
<-- |
TEST2 (SEL on YM2149) |
| |
IOA5 |
<-> |
16 |
25 |
<-- |
A8 |
| |
IOA4 |
<-> |
17 |
24 |
<-- |
!A9 |
| |
IOA3 |
<-> |
18 |
23 |
<-- |
!RESET |
| |
IOA2 |
<-> |
19 |
22 |
<-- |
CLK |
| |
IOA1 |
<-> |
20 |
21 |
<-> |
IOA0 |
|
| ANA_C |
<-- |
1 |
AY38912 |
28 |
<-> |
DA0 |
| TEST1 |
--> |
2 |
27 |
<-> |
DA1 |
| VCC |
--- |
3 |
26 |
<-> |
DA2 |
| ANA_B |
<-- |
4 |
25 |
<-> |
DA3 |
| ANA_A |
<-- |
5 |
24 |
<-> |
DA4 |
| GND |
--- |
6 |
23 |
<-> |
DA5 |
| IOA7 |
<-> |
7 |
22 |
<-> |
DA6 |
| IOA6 |
<-> |
8 |
21 |
<-> |
DA7 |
| IOA5 |
<-> |
9 |
20 |
<-- |
BC1 |
| IOA4 |
<-> |
10 |
19 |
<-- |
BC2 |
| IOA3 |
<-> |
11 |
18 |
<-- |
BDIR |
| IOA2 |
<-> |
12 |
17 |
<-- |
A8 |
| IOA1 |
<-> |
13 |
16 |
<-- |
!RESET |
| IOA0 |
<-> |
14 |
15 |
<-- |
CLK |
|
| |
| GND |
--- |
1 |
AY38913 |
24 |
<-- |
!CS |
| BDIR |
--> |
2 |
23 |
<-- |
A8 |
| BC1 |
--> |
3 |
22 |
<-- |
!A9 |
| DA7 |
<-> |
4 |
21 |
<-- |
!RESET |
| DA6 |
<-> |
5 |
20 |
<-- |
CLK |
| DA5 |
<-> |
6 |
19 |
--- |
GND |
| DA4 |
<-> |
7 |
18 |
--> |
ANA_C |
| DA3 |
<-> |
8 |
17 |
--> |
ANA_A |
| DA2 |
<-> |
9 |
16 |
--- |
NC |
| DA1 |
<-> |
10 |
15 |
--> |
ANA_B |
| DA0 |
<-> |
11 |
14 |
<-- |
TEST IN |
| TEST OUT |
<-- |
12 |
13 |
--- |
VCC |
|
The Yamaha YM2149 is pin and register compatible with the
AY38910, with the exception of pin 26 being unconnected TEST2 on
the AY38910 and the SEL input on the YM2149. Max clock input is 2
MHz for the AY38910 and the YM2149 with SEL high (internally
pulled up). If pin 26 is pulled low on the YM2149, the clock is
halved so the max clock input is 4 MHz.
It is NOT pin compatible with the AY38912!
Hardware structure
Approximate VHDL entity only!
entity AY38910 is
port( clk, n_reset,
A8, n_A9
bdir, bc1
bc2
test1, test2: in std_logic; --
da: inout std_logic_vector(7 downto 0);
ioa, iob, ioc: inout std_logic_vector(7 downto 0);
ana_a, ana_b, ana_c: out std_logic; -- analogue outputs
)
end entity AY38910;
entity AY38912 is
port( clk, n_reset,
A8, n_A9
bdir, bc1
bc2
test1, test2: in std_logic; --
da: inout std_logic_vector(7 downto 0);
ioa: inout std_logic_vector(7 downto 0);
ana_a, ana_b, ana_c: out std_logic; -- analogue outputs
)
end entity AY38912;
entity AY38913 is
port( clk, n_reset,
A8, n_A9,
bdir, bc1,
n_cs,
test_in: in std_logic; --
test_out: in std_logic; --
da: inout std_logic_vector(7 downto 0);
ana_a, ana_b, ana_c: out std_logic; -- analogue outputs
)
end entity AY38913;